Implemented Zero Page,X, Zero Page,Y, and Indirect addressing mode instructions, along with unit tests.
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@@ -192,9 +192,15 @@ public class Cpu implements InstructionTable {
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break;
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case 0x11: // TODO: implement
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break;
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case 0x15: // TODO: implement
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case 0x15: // ORA - Logical Inclusive OR - Zero Page,X
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a |= bus.read(zpxAddress(operands[0]));
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setArithmeticFlags(a);
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break;
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case 0x16: // TODO: implement
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case 0x16: // ASL - Arithmetic Shift Left - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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k = asl(j);
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bus.write(zpxAddress(operands[0]), k);
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setArithmeticFlags(k);
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break;
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case 0x18: // CLC - Clear Carry Flag - Implied
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clearCarryFlag();
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@@ -265,9 +271,16 @@ public class Cpu implements InstructionTable {
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break;
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case 0x31: // TODO: implement
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break;
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case 0x35: // TODO: implement
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case 0x35: // AND - Logical And - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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a &= j;
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setArithmeticFlags(a);
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break;
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case 0x36: // TODO: implement
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case 0x36: // ROL - Rotate Shift Left - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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k = rol(j);
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bus.write(zpxAddress(operands[0]), k);
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setArithmeticFlags(k);
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break;
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case 0x38: // SEC - Set Carry Flag - Implied
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setCarryFlag();
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@@ -327,9 +340,15 @@ public class Cpu implements InstructionTable {
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break;
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case 0x51: // TODO: implement
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break;
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case 0x55: // TODO: implement
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case 0x55: // EOR - Exclusive OR - Zero Page,X
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a ^= bus.read(zpxAddress(operands[0]));
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setArithmeticFlags(a);
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break;
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case 0x56: // TODO: implement
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case 0x56: // LSR - Logical Shift Right - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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k = lsr(j);
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bus.write(zpxAddress(operands[0]), k);
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setArithmeticFlags(k);
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break;
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case 0x58: // CLI - Clear Interrupt Disable - Implied
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clearIrqDisableFlag();
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@@ -377,7 +396,25 @@ public class Cpu implements InstructionTable {
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a = ror(a);
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setArithmeticFlags(a);
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break;
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case 0x6c: // TODO: implement
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case 0x6c: // JMP - Jump - Indirect
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lo = address(operands[0], operands[1]); // Address of low byte
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hi = lo+1; // Address of high byte
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pc = address(bus.read(lo), bus.read(hi));
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/* TODO: For accuracy, allow a flag to enable broken behavior
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* of early 6502s:
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*
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* "An original 6502 has does not correctly fetch the target
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* address if the indirect vector falls on a page boundary
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* (e.g. $xxFF where xx is and value from $00 to $FF). In this
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* case fetches the LSB from $xxFF as expected but takes the MSB
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* from $xx00. This is fixed in some later chips like the 65SC02
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* so for compatibility always ensure the indirect vector is not
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* at the end of the page."
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* (http://www.obelisk.demon.co.uk/6502/reference.html#JMP)
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*/
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break;
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case 0x6d: // ADC - Add with Carry - Absolute
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j = bus.read(address(operands[0], operands[1]));
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@@ -398,9 +435,19 @@ public class Cpu implements InstructionTable {
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break;
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case 0x71: // TODO: implement
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break;
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case 0x75: // TODO: implement
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case 0x75: // ADC - Add with Carry - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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if (decimalModeFlag) {
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a = adcDecimal(a, j);
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} else {
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a = adc(a, j);
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}
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break;
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case 0x76: // TODO: implement
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case 0x76: // ROR - Rotate Right - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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k = ror(j);
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bus.write(zpxAddress(operands[0]), k);
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setArithmeticFlags(k);
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break;
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case 0x78: // SEI - Set Interrupt Disable - Implied
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setIrqDisableFlag();
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@@ -451,11 +498,17 @@ public class Cpu implements InstructionTable {
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break;
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case 0x91: // TODO: implement
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break;
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case 0x94: // TODO: implement
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case 0x94: // STY - Store Y Register - Zero Page,X
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bus.write(zpxAddress(operands[0]), y);
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setArithmeticFlags(y);
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break;
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case 0x95: // TODO: implement
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case 0x95: // STA - Store Accumulator - Zero Page,X
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bus.write(zpxAddress(operands[0]), a);
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setArithmeticFlags(a);
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break;
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case 0x96: // TODO: implement
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case 0x96: // STX - Store X Register - Zero Page,Y
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bus.write(zpyAddress(operands[0]), x);
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setArithmeticFlags(x);
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break;
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case 0x98: // TYA - Transfer Y to Accumulator - Implied
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a = y;
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@@ -518,11 +571,17 @@ public class Cpu implements InstructionTable {
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break;
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case 0xb1: // TODO: implement
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break;
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case 0xb4: // TODO: implement
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case 0xb4: // LDY - Load Y Register - Zero Page,X
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y = bus.read(zpxAddress(operands[0]));
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setArithmeticFlags(y);
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break;
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case 0xb5: // TODO: implement
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case 0xb5: // LDA - Load Accumulator - Zero Page,X
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a = bus.read(zpxAddress(operands[0]));
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setArithmeticFlags(a);
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break;
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case 0xb6: // TODO: implement
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case 0xb6: // LDX - Load X Register - Zero Page,Y
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x = bus.read(zpyAddress(operands[0]));
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setArithmeticFlags(x);
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break;
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case 0xb8: // CLV - Clear Overflow Flag - Implied
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clearOverflowFlag();
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@@ -587,9 +646,14 @@ public class Cpu implements InstructionTable {
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break;
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case 0xd1: // TODO: implement
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break;
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case 0xd5: // TODO: implement
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case 0xd5: // CMP - Compare Accumulator - Zero Page,X
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cmp(a, bus.read(zpxAddress(operands[0])));
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break;
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case 0xd6: // TODO: implement
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case 0xd6: // DEC - Decrement Memory - Zero Page, X
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j = bus.read(zpxAddress(operands[0]));
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k = --j & 0xff;
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bus.write(zpxAddress(operands[0]), k);
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setArithmeticFlags(k);
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break;
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case 0xd8: // CLD - Clear Decimal Mode - Implied
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clearDecimalModeFlag();
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@@ -659,9 +723,19 @@ public class Cpu implements InstructionTable {
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break;
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case 0xf1: // TODO: implement
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break;
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case 0xf5: // TODO: implement
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case 0xf5: // SBC - Subtract with Carry - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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if (decimalModeFlag) {
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a = sbcDecimal(a, j);
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} else {
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a = sbc(a, j);
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}
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break;
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case 0xf6: // TODO: implement
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case 0xf6: // INC - Increment Memory Location - Zero Page,X
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j = bus.read(zpxAddress(operands[0]));
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k = ++j & 0xff;
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bus.write(zpxAddress(operands[0]), k);
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setArithmeticFlags(k);
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break;
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case 0xf8: // SED - Set Decimal Flag - Implied
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setDecimalModeFlag();
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@@ -1387,6 +1461,20 @@ public class Cpu implements InstructionTable {
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return ((hiByte<<8)|lowByte);
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}
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/**
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* Given a single byte, compute the Zero Page,X offset address.
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*/
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int zpxAddress(int zp) {
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return (zp+getXRegister())&0xff;
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}
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/**
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* Given a single byte, compute the Zero Page,Y offset address.
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*/
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int zpyAddress(int zp) {
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return (zp+getYRegister())&0xff;
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}
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/**
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* Given an opcode and its operands, return a formatted name.
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*
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