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Fix #17: Correct disassembly

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Seth Morabito committed 2025-03-15 15:46:50 -07:00
1 parent 963526621d
commit 2284535b7f
3 files changed
+116 -33
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src/main/java/com/loomcom/symon/Cpu.java
+4
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@@ -1925,6 +1925,7 @@ public class Cpu implements InstructionTable {
break; break;
case AIX: case AIX:
sb.append(" ($").append(Utils.wordToHex(Utils.address(args[0], args[1]))).append(",X)"); sb.append(" ($").append(Utils.wordToHex(Utils.address(args[0], args[1]))).append(",X)");
break;
case ABX: case ABX:
sb.append(" $").append(Utils.wordToHex(Utils.address(args[0], args[1]))).append(",X"); sb.append(" $").append(Utils.wordToHex(Utils.address(args[0], args[1]))).append(",X");
break; break;
@@ -1937,6 +1938,9 @@ public class Cpu implements InstructionTable {
case IND: case IND:
sb.append(" ($").append(Utils.wordToHex(Utils.address(args[0], args[1]))).append(")"); sb.append(" ($").append(Utils.wordToHex(Utils.address(args[0], args[1]))).append(")");
break; break;
case ZPI:
sb.append(" ($").append(Utils.byteToHex(args[0])).append(")");
break;
case XIN: case XIN:
sb.append(" ($").append(Utils.byteToHex(args[0])).append(",X)"); sb.append(" ($").append(Utils.byteToHex(args[0])).append(",X)");
break; break;
src/main/java/com/loomcom/symon/InstructionTable.java
+38 -33
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@@ -62,11 +62,13 @@ public interface InstructionTable {
return "Accumulator"; return "Accumulator";
} }
}, },
AIX { AIX {
public String toString() { public String toString() {
return "Absolute, X-Indexed Indirect"; return "Absolute, X-Indexed Indirect";
} }
}, },
ABS { ABS {
public String toString() { public String toString() {
return "Absolute"; return "Absolute";
@@ -162,41 +164,44 @@ public interface InstructionTable {
/** /**
* Instruction opcode names. This lists all opcodes for * Instruction opcode names. This lists all opcodes for
* NMOS 6502, CMOS 65C02, and CMOS 65C816 * NMOS 6502, CMOS 65C02, and CMOS 65C816.
* <p>
* TODO (2025-03-14): This table is clearly wrong for 65C816.
* TODO (2025-03-14): Rockwell/WDC 65C02 names conflict with 65C816 names.
*/ */
String[] opcodeNames = { String[] opcodeNames = {
"BRK", "ORA", "NOP", "NOP", "TSB", "ORA", "ASL", "RMB0", // 0x00-0x07 "BRK", "ORA", "NOP", "NOP", "TSB", "ORA", "ASL", "RMB0", // 0x00-0x07
"PHP", "ORA", "ASL", "NOP", "TSB", "ORA", "ASL", "BBR0", // 0x08-0x0f "PHP", "ORA", "ASL", "NOP", "TSB", "ORA", "ASL", "BBR0", // 0x08-0x0f
"BPL", "ORA", "ORA", "NOP", "TRB", "ORA", "ASL", "RMB1", // 0x10-0x17 "BPL", "ORA", "ORA", "NOP", "TRB", "ORA", "ASL", "RMB1", // 0x10-0x17
"CLC", "ORA", "INC", "NOP", "TRB", "ORA", "ASL", "BBR1", // 0x18-0x1f "CLC", "ORA", "INC", "NOP", "TRB", "ORA", "ASL", "BBR1", // 0x18-0x1f
"JSR", "AND", "NOP", "NOP", "BIT", "AND", "ROL", "RMB2", // 0x20-0x27 "JSR", "AND", "NOP", "NOP", "BIT", "AND", "ROL", "RMB2", // 0x20-0x27
"PLP", "AND", "ROL", "NOP", "BIT", "AND", "ROL", "BBR2", // 0x28-0x2f "PLP", "AND", "ROL", "NOP", "BIT", "AND", "ROL", "BBR2", // 0x28-0x2f
"BMI", "AND", "AND", "NOP", "BIT", "AND", "ROL", "RMB3", // 0x30-0x37 "BMI", "AND", "AND", "NOP", "BIT", "AND", "ROL", "RMB3", // 0x30-0x37
"SEC", "AND", "DEC", "NOP", "BIT", "AND", "ROL", "BBR3", // 0x38-0x3f "SEC", "AND", "DEC", "NOP", "BIT", "AND", "ROL", "BBR3", // 0x38-0x3f
"RTI", "EOR", "NOP", "NOP", "NOP", "EOR", "LSR", "RMB4", // 0x40-0x47 "RTI", "EOR", "NOP", "NOP", "NOP", "EOR", "LSR", "RMB4", // 0x40-0x47
"PHA", "EOR", "LSR", "NOP", "JMP", "EOR", "LSR", "BBR4", // 0x48-0x4f "PHA", "EOR", "LSR", "NOP", "JMP", "EOR", "LSR", "BBR4", // 0x48-0x4f
"BVC", "EOR", "EOR", "NOP", "NOP", "EOR", "LSR", "RMB5", // 0x50-0x57 "BVC", "EOR", "EOR", "NOP", "NOP", "EOR", "LSR", "RMB5", // 0x50-0x57
"CLI", "EOR", "PHY", "NOP", "NOP", "EOR", "LSR", "BBR5", // 0x58-0x5f "CLI", "EOR", "PHY", "NOP", "NOP", "EOR", "LSR", "BBR5", // 0x58-0x5f
"RTS", "ADC", "NOP", "NOP", "STZ", "ADC", "ROR", "RMB6", // 0x60-0x67 "RTS", "ADC", "NOP", "NOP", "STZ", "ADC", "ROR", "RMB6", // 0x60-0x67
"PLA", "ADC", "ROR", "NOP", "JMP", "ADC", "ROR", "BBR6", // 0x68-0x6f "PLA", "ADC", "ROR", "NOP", "JMP", "ADC", "ROR", "BBR6", // 0x68-0x6f
"BVS", "ADC", "ADC", "NOP", "STZ", "ADC", "ROR", "RMB7", // 0x70-0x77 "BVS", "ADC", "ADC", "NOP", "STZ", "ADC", "ROR", "RMB7", // 0x70-0x77
"SEI", "ADC", "PLY", "NOP", "JMP", "ADC", "ROR", "BBR7", // 0x78-0x7f "SEI", "ADC", "PLY", "NOP", "JMP", "ADC", "ROR", "BBR7", // 0x78-0x7f
"BRA", "STA", "NOP", "NOP", "STY", "STA", "STX", "SMB0", // 0x80-0x87 "BRA", "STA", "NOP", "NOP", "STY", "STA", "STX", "SMB0", // 0x80-0x87
"DEY", "BIT", "TXA", "NOP", "STY", "STA", "STX", "BBS0", // 0x88-0x8f "DEY", "BIT", "TXA", "NOP", "STY", "STA", "STX", "BBS0", // 0x88-0x8f
"BCC", "STA", "STA", "NOP", "STY", "STA", "STX", "SMB1", // 0x90-0x97 "BCC", "STA", "STA", "NOP", "STY", "STA", "STX", "SMB1", // 0x90-0x97
"TYA", "STA", "TXS", "NOP", "STZ", "STA", "STZ", "BBS1", // 0x98-0x9f "TYA", "STA", "TXS", "NOP", "STZ", "STA", "STZ", "BBS1", // 0x98-0x9f
"LDY", "LDA", "LDX", "NOP", "LDY", "LDA", "LDX", "SMB2", // 0xa0-0xa7 "LDY", "LDA", "LDX", "NOP", "LDY", "LDA", "LDX", "SMB2", // 0xa0-0xa7
"TAY", "LDA", "TAX", "NOP", "LDY", "LDA", "LDX", "BBS2", // 0xa8-0xaf "TAY", "LDA", "TAX", "NOP", "LDY", "LDA", "LDX", "BBS2", // 0xa8-0xaf
"BCS", "LDA", "LDA", "NOP", "LDY", "LDA", "LDX", "SMB3", // 0xb0-0xb7 "BCS", "LDA", "LDA", "NOP", "LDY", "LDA", "LDX", "SMB3", // 0xb0-0xb7
"CLV", "LDA", "TSX", "NOP", "LDY", "LDA", "LDX", "BBS3", // 0xb8-0xbf "CLV", "LDA", "TSX", "NOP", "LDY", "LDA", "LDX", "BBS3", // 0xb8-0xbf
"CPY", "CMP", "NOP", "NOP", "CPY", "CMP", "DEC", "SMB4", // 0xc0-0xc7 "CPY", "CMP", "NOP", "NOP", "CPY", "CMP", "DEC", "SMB4", // 0xc0-0xc7
"INY", "CMP", "DEX", "NOP", "CPY", "CMP", "DEC", "BBS4", // 0xc8-0xcf "INY", "CMP", "DEX", "NOP", "CPY", "CMP", "DEC", "BBS4", // 0xc8-0xcf
"BNE", "CMP", "CMP", "NOP", "NOP", "CMP", "DEC", "SMB5", // 0xd0-0xd7 "BNE", "CMP", "CMP", "NOP", "NOP", "CMP", "DEC", "SMB5", // 0xd0-0xd7
"CLD", "CMP", "PHX", "NOP", "NOP", "CMP", "DEC", "BBS5", // 0xd8-0xdf "CLD", "CMP", "PHX", "NOP", "NOP", "CMP", "DEC", "BBS5", // 0xd8-0xdf
"CPX", "SBC", "NOP", "NOP", "CPX", "SBC", "INC", "SMB6", // 0xe0-0xe7 "CPX", "SBC", "NOP", "NOP", "CPX", "SBC", "INC", "SMB6", // 0xe0-0xe7
"INX", "SBC", "NOP", "NOP", "CPX", "SBC", "INC", "BBS6", // 0xe8-0xef "INX", "SBC", "NOP", "NOP", "CPX", "SBC", "INC", "BBS6", // 0xe8-0xef
"BEQ", "SBC", "SBC", "NOP", "NOP", "SBC", "INC", "SMB7", // 0xf0-0xf7 "BEQ", "SBC", "SBC", "NOP", "NOP", "SBC", "INC", "SMB7", // 0xf0-0xf7
"SED", "SBC", "PLX", "NOP", "NOP", "SBC", "INC", "BBS7" // 0xf8-0xff "SED", "SBC", "PLX", "NOP", "NOP", "SBC", "INC", "BBS7" // 0xf8-0xff
}; };
/** /**
src/test/java/com/loomcom/symon/CpuTest.java
+74
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@@ -670,4 +670,78 @@ public class CpuTest extends TestCase {
cpu.step(); cpu.step();
assertEquals(0x3E, cpu.getAccumulator()); assertEquals(0x3E, cpu.getAccumulator());
} }
// Have tests:
// ACC, AIX, ABS, ABX, ABY, IMP, IMM, IND, XIN, INY,
// REL, ZPG, ZPI
// Need to test:
// ZPR, ZPX, ZPY, NUL
// Question: Should 'NUL' even exist? Isn't it just 'IMP'?
public void testDisassembleOpHandlesAccumulatorCorrectly() {
var dis = Cpu.disassembleOp(0x2a, new int[]{});
assertEquals("ROL", dis);
}
public void testDisassembleOpHandlesAbsoluteXIndexedIndirectCorrectly() {
var dis = Cpu.disassembleOp(0x7c, new int[]{0x00, 0x1a});
assertEquals("JMP ($1A00,X)", dis);
}
public void testDisassembleOpHandlesAbsoluteCorrectly() {
var dis = Cpu.disassembleOp(0x0d, new int[]{0x10, 0x0c});
assertEquals("ORA $0C10", dis);
}
public void testDisassembleOpHandlesAbsoluteXIndexedCorrectly() {
var dis = Cpu.disassembleOp(0x1d, new int[]{0x00, 0x1c});
assertEquals("ORA $1C00,X", dis);
}
public void testDisassembleOpHandlesAbsoluteYIndexedCorrectly() {
var dis = Cpu.disassembleOp(0x19, new int[]{0x00, 0x1c});
assertEquals("ORA $1C00,Y", dis);
}
public void testDisassembleOpHandlesImpliedCorrectly() {
var dis = Cpu.disassembleOp(0x00, new int[]{});
assertEquals("BRK", dis);
}
public void testDisassembleOpHandlesIndirectCorrectly() {
var dis = Cpu.disassembleOp(0x6c, new int[]{0x00, 0x1c});
assertEquals("JMP ($1C00)", dis);
}
public void testDisassembleOpHandlesImmediateCorrectly() {
var dis = Cpu.disassembleOp(0xA9, new int[]{0xff});
assertEquals("LDA #$FF", dis);
}
public void testDisassembleOpHandlesXIndexedIndirectCorrectly() {
var dis = Cpu.disassembleOp(0x01, new int[]{0x10});
assertEquals("ORA ($10,X)", dis);
}
public void testDisassembleOpHandlesIndirectYIndexedCorrectly() {
var dis = Cpu.disassembleOp(0x11, new int[]{0x10});
assertEquals("ORA ($10),Y", dis);
}
public void testDisassembleOpHandlesRelativeCorrectly() {
var dis = Cpu.disassembleOp(0x10, new int[]{0xff});
assertEquals("BPL $FF", dis);
}
public void testDisassembleOpHandlesZeroPageCorrectly() {
var dis = Cpu.disassembleOp(0x24, new int[]{0x10});
assertEquals("BIT $10", dis);
}
public void testDisassembleOpHandlesZeroPageIndirectCorrectly() throws Exception {
var dis = Cpu.disassembleOp(0xB2, new int[]{0x1a});
assertEquals("LDA ($1A)", dis);
}
} }