Work In Progress: CPU behavior, UI changes
This is something of a "Work in Progress" checkpoint of several features that are all half baked: 1. Allow loading of 16KB ROM files at address $C000 at run-time, not just at startup. See the "Load ROM..." File menu item. 2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU implementation can match the behavior of either an early NMOS 6502, late NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so far. 3. Adds a completely bogus implementation of the 6522 VIA (it does absolutely nothing right now). 4. Changes the address of the ACIA in the simulated system to match a real hardware implementation I put together.
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@@ -10,11 +10,16 @@ import com.loomcom.symon.exceptions.*;
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*/
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public class Bus {
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// The default address at which to load programs
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public static int DEFAULT_LOAD_ADDRESS = 0x0200;
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// By default, our bus starts at 0, and goes up to 64K
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private int startAddress = 0x0000;
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private int endAddress = 0xffff;
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// The CPU
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private Cpu cpu;
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// Ordered list of IO devices.
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private SortedSet<Device> devices;
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@@ -36,8 +41,13 @@ public class Bus {
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return endAddress;
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}
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public void addDevice(Device device)
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throws MemoryRangeException {
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/**
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* Add a device to the bus. Throws a MemoryRangeException if the device overlaps with any others.
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*
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* @param device
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* @throws MemoryRangeException
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*/
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public void addDevice(Device device) throws MemoryRangeException {
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// Make sure there's no memory overlap.
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MemoryRange memRange = device.getMemoryRange();
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for (Device d : devices) {
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@@ -54,9 +64,20 @@ public class Bus {
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devices.add(device);
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}
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/**
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* Remove a device from the bus.
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*
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* @param device
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*/
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public void removeDevice(Device device) {
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if (devices.contains(device)) {
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devices.remove(device);
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}
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}
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public void addCpu(Cpu cpu) {
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cpu.setBus(this);
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this.cpu = cpu;
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cpu.setBus(this);
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}
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/**
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