Work In Progress: CPU behavior, UI changes

This is something of a "Work in Progress" checkpoint of several features
that are all half baked:

1. Allow loading of 16KB ROM files at address $C000 at run-time, not
   just at startup. See the "Load ROM..." File menu item.

2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU
   implementation can match the behavior of either an early NMOS 6502, late
   NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so
   far.

3. Adds a completely bogus implementation of the 6522 VIA (it
   does absolutely nothing right now).

4. Changes the address of the ACIA in the simulated system to match a
   real hardware implementation I put together.
This commit is contained in:
Seth Morabito committed 2012-11-25 22:49:21 -08:00
1 parent 795ccfde5d
commit 2ebdd254b3
33 files changed
+822 -443

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@@ -19,8 +19,8 @@ public class CpuAbsoluteModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuAbsoluteXModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuAbsoluteYModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuAccumulatorModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00)>>>8);
cpu.reset();
@@ -19,8 +19,8 @@ public class CpuImmediateModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuImpliedModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00)>>>8);
cpu.reset();
@@ -20,8 +20,8 @@ public class CpuIndexedIndirectModeTest {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00)>>>8);
cpu.reset();
// Assert initial state
@@ -20,8 +20,8 @@ public class CpuIndirectIndexedModeTest {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00)>>>8);
cpu.reset();
// Assert initial state
@@ -2,53 +2,102 @@ package com.loomcom.symon;
import com.loomcom.symon.devices.Memory;
import com.loomcom.symon.exceptions.MemoryAccessException;
import com.loomcom.symon.InstructionTable;
import junit.framework.TestCase;
public class CpuIndirectModeTest extends TestCase {
protected Cpu cpu;
protected Bus bus;
protected Memory mem;
protected Cpu cpu;
protected Bus bus;
protected Memory mem;
protected void setUp() throws Exception {
this.cpu = new Cpu();
this.bus = new Bus(0x0000, 0xffff);
this.mem = new Memory(0x0000, 0x10000);
bus.addCpu(cpu);
bus.addDevice(mem);
protected void setUp() throws Exception {
this.cpu = new Cpu();
this.bus = new Bus(0x0000, 0xffff);
this.mem = new Memory(0x0000, 0x10000);
bus.addCpu(cpu);
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
// Load the reset vector.
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
assertEquals(0, cpu.getAccumulator());
assertEquals(0, cpu.getXRegister());
assertEquals(0, cpu.getYRegister());
assertEquals(0x200, cpu.getProgramCounter());
assertEquals(0xff, cpu.getStackPointer());
assertEquals(0x20, cpu.getProcessorStatus());
}
cpu.reset();
// Assert initial state
assertEquals(0, cpu.getAccumulator());
assertEquals(0, cpu.getXRegister());
assertEquals(0, cpu.getYRegister());
assertEquals(0x200, cpu.getProgramCounter());
assertEquals(0xff, cpu.getStackPointer());
assertEquals(0x20, cpu.getProcessorStatus());
}
/*
* The following opcodes are tested for correctness in this file:
*
* JMP - $6c
*
*/
/*
* The following opcodes are tested for correctness in this file:
*
* JMP - $6c
*
*/
/* JMP - Jump - $6c */
/* JMP - Jump - $6c */
public void test_JMP() throws MemoryAccessException {
bus.write(0x3400, 0x00);
bus.write(0x3401, 0x54);
bus.loadProgram(0x6c, 0x00, 0x34);
cpu.step();
assertEquals(0x5400, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
public void test_JMP_notOnPageBoundary() throws MemoryAccessException {
bus.write(0x3400, 0x00);
bus.write(0x3401, 0x54);
bus.loadProgram(0x6c, 0x00, 0x34);
cpu.step();
assertEquals(0x5400, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
public void test_JMP_with_ROR_Bug() throws MemoryAccessException {
cpu.setBehavior(Cpu.CpuBehavior.NMOS_WITH_ROR_BUG);
bus.write(0x3400, 0x22);
bus.write(0x34ff, 0x00);
bus.write(0x3500, 0x54);
bus.loadProgram(0x6c, 0xff, 0x34);
cpu.step();
assertEquals(0x2200, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
public void test_JMP_withIndirectBug() throws MemoryAccessException {
cpu.setBehavior(Cpu.CpuBehavior.NMOS_WITH_INDIRECT_JMP_BUG);
bus.write(0x3400, 0x22);
bus.write(0x34ff, 0x00);
bus.write(0x3500, 0x54);
bus.loadProgram(0x6c, 0xff, 0x34);
cpu.step();
assertEquals(0x2200, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
public void test_JMP_withOutIndirectBug() throws MemoryAccessException {
cpu.setBehavior(Cpu.CpuBehavior.NMOS_WITHOUT_INDIRECT_JMP_BUG);
bus.write(0x3400, 0x22);
bus.write(0x34ff, 0x00);
bus.write(0x3500, 0x54);
bus.loadProgram(0x6c, 0xff, 0x34);
cpu.step();
assertEquals(0x5400, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
public void test_JMP_cmos() throws MemoryAccessException {
cpu.setBehavior(Cpu.CpuBehavior.CMOS);
bus.write(0x3400, 0x22);
bus.write(0x34ff, 0x00);
bus.write(0x3500, 0x54);
bus.loadProgram(0x6c, 0xff, 0x34);
cpu.step();
assertEquals(0x5400, cpu.getProgramCounter());
// No change to status flags.
assertEquals(0x20, cpu.getProcessorStatus());
}
}
@@ -18,8 +18,8 @@ public class CpuIndirectXModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuRelativeModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00)>>>8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuZeroPageModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuZeroPageXModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -19,8 +19,8 @@ public class CpuZeroPageYModeTest extends TestCase {
bus.addDevice(mem);
// Load the reset vector.
bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
cpu.reset();
// Assert initial state
@@ -0,0 +1,39 @@
package com.loomcom.symon;
import com.loomcom.symon.util.FifoRingBuffer;
import junit.framework.TestCase;
import java.lang.Character;
/**
* Created with IntelliJ IDEA.
* User: seth
* Date: 11/22/12
* Time: 11:28 PM
* To change this template use File | Settings | File Templates.
*/
public class FifoRingBufferTest extends TestCase {
public void testRingBufferShouldDeleteOldestItemIfAtMaximum() {
FifoRingBuffer<Character> buffer = new FifoRingBuffer<Character>(3);
assertEquals(0, buffer.length());
buffer.push('a');
assertEquals(1, buffer.length());
assertTrue('a' == buffer.peek());
buffer.push('b');
assertEquals(2, buffer.length());
assertTrue('a' == buffer.peek());
buffer.push('c');
assertEquals(3, buffer.length());
assertTrue('a' == buffer.peek());
buffer.push('d');
assertEquals(3, buffer.length());
assertTrue('b' == buffer.peek());
buffer.push('e');
assertEquals(3, buffer.length());
assertTrue('c' == buffer.peek());
}
}