IRQ and NMI handling at CPU level.
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@@ -160,6 +160,14 @@ public class Cpu implements InstructionTable {
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// Store the address from which the IR was read, for debugging
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// Store the address from which the IR was read, for debugging
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state.lastPc = state.pc;
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state.lastPc = state.pc;
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// Check for Interrupts before doing anything else.
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// This will set the PC and jump to the interrupt vector.
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if (state.nmiAsserted) {
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handleNmi();
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} else if (state.irqAsserted && !getIrqDisableFlag()) {
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handleIrq();
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}
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// Fetch memory location for this instruction.
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// Fetch memory location for this instruction.
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state.ir = bus.read(state.pc);
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state.ir = bus.read(state.pc);
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irAddressMode = (state.ir >> 2) & 0x07;
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irAddressMode = (state.ir >> 2) & 0x07;
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@@ -251,16 +259,7 @@ public class Cpu implements InstructionTable {
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/** Single Byte Instructions; Implied and Relative **/
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/** Single Byte Instructions; Implied and Relative **/
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case 0x00: // BRK - Force Interrupt - Implied
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case 0x00: // BRK - Force Interrupt - Implied
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if (!getIrqDisableFlag()) {
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if (!getIrqDisableFlag()) {
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// Set the break flag before pushing.
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handleIrq();
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setBreakFlag();
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// Push program counter + 1 onto the stack
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stackPush((state.pc + 1 >> 8) & 0xff); // PC high byte
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stackPush(state.pc + 1 & 0xff); // PC low byte
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stackPush(state.getStatusFlag());
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// Set the Interrupt Disabled flag. RTI will clear it.
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setIrqDisableFlag();
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// Load interrupt vector address into PC
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state.pc = address(bus.read(IRQ_VECTOR_L), bus.read(IRQ_VECTOR_H));
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}
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}
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break;
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break;
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case 0x08: // PHP - Push Processor Status - Implied
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case 0x08: // PHP - Push Processor Status - Implied
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@@ -733,6 +732,37 @@ public class Cpu implements InstructionTable {
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delayLoop(state.ir);
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delayLoop(state.ir);
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}
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}
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private void handleIrq() throws MemoryAccessException {
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handleInterrupt(IRQ_VECTOR_L, IRQ_VECTOR_H);
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clearIrq();
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}
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private void handleNmi() throws MemoryAccessException {
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handleInterrupt(NMI_VECTOR_L, NMI_VECTOR_H);
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clearNmi();
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}
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/**
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* Handle the common behavior of BRK, /IRQ, and /NMI
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*
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* @throws MemoryAccessException
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*/
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private void handleInterrupt(int vectorLow, int vectorHigh) throws MemoryAccessException {
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// Set the break flag before pushing.
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setBreakFlag();
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// Push program counter + 1 onto the stack
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stackPush((state.pc + 1 >> 8) & 0xff); // PC high byte
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stackPush(state.pc + 1 & 0xff); // PC low byte
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stackPush(state.getStatusFlag());
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// Set the Interrupt Disabled flag. RTI will clear it.
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setIrqDisableFlag();
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// Load interrupt vector address into PC
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state.pc = address(bus.read(vectorLow), bus.read(vectorHigh));
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}
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/**
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/**
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* Add with Carry, used by all addressing mode implementations of ADC.
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* Add with Carry, used by all addressing mode implementations of ADC.
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* As a side effect, this will set the overflow and carry flags as
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* As a side effect, this will set the overflow and carry flags as
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@@ -20,7 +20,7 @@ public class CpuAccumulatorModeTest extends TestCase {
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// Load the reset vector.
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// Load the reset vector.
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bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
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bus.write(0xfffc, Bus.DEFAULT_LOAD_ADDRESS & 0x00ff);
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bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00)>>>8);
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bus.write(0xfffd, (Bus.DEFAULT_LOAD_ADDRESS & 0xff00) >>> 8);
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cpu.reset();
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cpu.reset();
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@@ -345,6 +345,153 @@ public class CpuTest extends TestCase {
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assertFalse(cpu.getNegativeFlag());
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assertFalse(cpu.getNegativeFlag());
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}
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}
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public void testIrq() throws Exception {
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// Ensure the IRQ disable flag is cleared
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cpu.clearIrqDisableFlag();
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// Set the IRQ vector
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bus.write(0xffff, 0x12);
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bus.write(0xfffe, 0x34);
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// Create an IRQ handler at 0x1234
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cpu.setProgramCounter(0x1234);
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bus.loadProgram(0xa9, 0x33, // LDA #$33
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0x69, 0x01); // ADC #$01
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cpu.setProgramCounter(0x0200);
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// Create a little program at 0x0200
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bus.loadProgram(0x18, // CLC
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0xa9, 0x01, // LDA #$00
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0x69, 0x01); // ADC #$01
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cpu.step();
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assertEquals(0x0201, cpu.getProgramCounter()); // First instruction executed.
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assertEquals(0x00, cpu.getAccumulator());
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cpu.step();
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assertEquals(0x0203, cpu.getProgramCounter());
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assertEquals(0x01, cpu.getAccumulator());
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cpu.assertIrq();
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cpu.step();
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assertTrue(cpu.getIrqDisableFlag()); // Should have been set by the IRQ
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assertEquals(0x1236, cpu.getProgramCounter());
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assertEquals(0x33, cpu.getAccumulator());
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// Be sure that the IRQ line is no longer held low
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assertFalse(cpu.getCpuState().irqAsserted);
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}
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public void testIrqHonorsIrqDisabledFlag() throws Exception {
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// Ensure the IRQ disable flag is set
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cpu.setIrqDisableFlag();
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// Set the IRQ vector
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bus.write(0xffff, 0x12);
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bus.write(0xfffe, 0x34);
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// Create an IRQ handler at 0x1234
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cpu.setProgramCounter(0x1234);
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bus.loadProgram(0xa9, 0x33, // LDA #$33
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0x69, 0x01); // ADC #$01
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cpu.setProgramCounter(0x0200);
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// Create a little program at 0x0200
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bus.loadProgram(0x18, // CLC
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0xa9, 0x01, // LDA #$00
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0x69, 0x01); // ADC #$01
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cpu.step();
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assertEquals(0x0201, cpu.getProgramCounter()); // First instruction executed.
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assertEquals(0x00, cpu.getAccumulator());
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cpu.step();
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assertEquals(0x0203, cpu.getProgramCounter());
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assertEquals(0x01, cpu.getAccumulator());
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cpu.assertIrq(); // Should be ignored, because the disable flag is set.
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cpu.step();
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assertTrue(cpu.getIrqDisableFlag()); // Should have been left alone.
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assertEquals(0x0205, cpu.getProgramCounter());
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assertEquals(0x02, cpu.getAccumulator());
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}
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public void testNmi() throws Exception {
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// Set the NMI vector to 0x1000
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bus.write(0xfffb, 0x10);
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bus.write(0xfffa, 0x00);
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// Create an NMI handler at 0x1000
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cpu.setProgramCounter(0x1000);
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bus.loadProgram(0xa9, 0x33, // LDA #$33
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0x69, 0x01); // ADC #$01
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// Create a little program at 0x0200
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cpu.setProgramCounter(0x0200);
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bus.loadProgram(0x18, // CLC
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0xa9, 0x01, // LDA #$00
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0x69, 0x01); // ADC #$01
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cpu.step();
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assertEquals(0x0201, cpu.getProgramCounter()); // First instruction executed.
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assertEquals(0x00, cpu.getAccumulator());
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cpu.step();
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assertEquals(0x0203, cpu.getProgramCounter());
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assertEquals(0x01, cpu.getAccumulator());
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cpu.assertNmi();
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cpu.step();
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assertTrue(cpu.getIrqDisableFlag()); // Should have been set by the NMI
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assertEquals(0x1002, cpu.getProgramCounter());
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assertEquals(0x33, cpu.getAccumulator());
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// Be sure that the NMI line is no longer held low
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assertFalse(cpu.getCpuState().nmiAsserted);
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}
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public void testNmiIgnoresIrqDisableFlag() throws Exception {
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// Set the IRQ disable flag, which should be ignored by the NMI
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cpu.setIrqDisableFlag();
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// Set the NMI vector to 0x1000
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bus.write(0xfffb, 0x10);
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bus.write(0xfffa, 0x00);
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// Create an NMI handler at 0x1000
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cpu.setProgramCounter(0x1000);
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bus.loadProgram(0xa9, 0x33, // LDA #$33
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0x69, 0x01); // ADC #$01
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// Create a little program at 0x0200
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cpu.setProgramCounter(0x0200);
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bus.loadProgram(0x18, // CLC
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0xa9, 0x01, // LDA #$00
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0x69, 0x01); // ADC #$01
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cpu.step();
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assertEquals(0x0201, cpu.getProgramCounter()); // First instruction executed.
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assertEquals(0x00, cpu.getAccumulator());
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cpu.step();
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assertEquals(0x0203, cpu.getProgramCounter());
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assertEquals(0x01, cpu.getAccumulator());
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cpu.assertNmi();
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cpu.step();
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assertTrue(cpu.getIrqDisableFlag()); // Should have been set by the NMI
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assertEquals(0x1002, cpu.getProgramCounter());
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assertEquals(0x33, cpu.getAccumulator());
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// Be sure that the NMI line is no longer held low
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assertFalse(cpu.getCpuState().nmiAsserted);
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}
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public void testAddress() {
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public void testAddress() {
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assertEquals(0xf1ea, cpu.address(0xea, 0xf1));
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assertEquals(0xf1ea, cpu.address(0xea, 0xf1));
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assertEquals(0x00ea, cpu.address(0xea, 0x00));
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assertEquals(0x00ea, cpu.address(0xea, 0x00));
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