CPU bug fixes and Simulator enhancements.
Bug Fixes: - Fixed several bugs in the CPU that caused processor status flags to be set incorrectly. Instructions affected were: STA, STX, STY, CMP, CPX, CPY, BIT. - Made some internal-use-only methods on the CPU class private. - Fixed incorrect disassembly of (Indirect,X) and (Indirect),Y instructions. Although this didn't affect behavior, it certainly caused me some confusion in debugging. - Added missing "BCS" instruction to instruction table. Enhancements: - Now includes a full version of Lee Davison's Enhanced 6502 BASIC bundled as source code and a ROM image. Get that REAL COMPUTER EXPERIENCE!(tm) - If a file named "rom.bin" exists in the same directory where the simulator is executed, it will be loaded at addresses $d000-$ffff. - Gave the CPU an idle loop to make simulated timing a little more realistic (but this is still an area needing major improvement) - Changed the CPU's toString() method to give better debugging output. - Added a small typeahead buffer to the Console. - Better exception messaging. Misc: - Bumped version to 0.5, updated README.
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; minimal monitor for EhBASIC and 6502 simulator V1.05
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; To run EhBASIC on the simulator load and assemble [F7] this file, start the simulator
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; running [F6] then start the code with the RESET [CTRL][SHIFT]R. Just selecting RUN
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; will do nothing, you'll still have to do a reset to run the code.
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.feature labels_without_colons
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.include "basic.asm"
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; put the IRQ and MNI code in RAM so that it can be changed
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IRQ_vec = VEC_SV+2 ; IRQ code vector
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NMI_vec = IRQ_vec+$0A ; NMI code vector
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; setup for the 6502 simulator environment
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IO_AREA = $C000
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ACIAdata = IO_AREA ; simulated ACIA r/w port
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ACIAstatus = IO_AREA+1
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ACIAcommand = IO_AREA+2
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ACIAcontrol = IO_AREA+3
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; now the code. all this does is set up the vectors and interrupt code
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; and wait for the user to select [C]old or [W]arm start. nothing else
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; fits in less than 128 bytes
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.segment "MONITOR"
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.org $FF00 ; pretend this is in a 1/8K ROM
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; reset vector points here
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RES_vec
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CLD ; clear decimal mode
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LDX #$FF ; empty stack
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TXS ; set the stack
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; Initialize the ACIA
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ACIA_init
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LDA #$09
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STA ACIAcommand
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LDA #$1A ; Set output for 8-N-1 2400
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STA ACIAcontrol
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; set up vectors and interrupt code, copy them to page 2
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LDY #END_CODE-LAB_vec ; set index/count
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LAB_stlp
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LDA LAB_vec-1,Y ; get byte from interrupt code
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STA VEC_IN-1,Y ; save to RAM
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DEY ; decrement index/count
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BNE LAB_stlp ; loop if more to do
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; now do the signon message, Y = $00 here
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LAB_signon
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LDA LAB_mess,Y ; get byte from sign on message
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BEQ LAB_nokey ; exit loop if done
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JSR V_OUTP ; output character
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INY ; increment index
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BNE LAB_signon ; loop, branch always
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LAB_nokey
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JSR V_INPT ; call scan input device
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BCC LAB_nokey ; loop if no key
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AND #$DF ; mask xx0x xxxx, ensure upper case
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CMP #'W' ; compare with [W]arm start
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BEQ LAB_dowarm ; branch if [W]arm start
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CMP #'C' ; compare with [C]old start
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BNE RES_vec ; loop if not [C]old start
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JMP LAB_COLD ; do EhBASIC cold start
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LAB_dowarm
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JMP LAB_WARM ; do EhBASIC warm start
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; byte out to simulated ACIA
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ACIAout
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PHA ; save accumulator
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ACIAout_w
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LDA ACIAstatus ; Read 6551 status
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AND #$10 ; Is tx buffer full?
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BEQ ACIAout_w ; if not, loop back
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PLA ; Otherwise, restore accumulator
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STA ACIAdata ; write byte to 6551
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RTS
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; byte in from simulated ACIA
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ACIAin
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LDA ACIAstatus ; Read 6551 status
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AND #$08 ;
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BEQ LAB_nobyw ; If rx buffer empty, no byte
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LDA ACIAdata ; Read byte from 6551
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SEC ; Flag byte received
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RTS
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LAB_nobyw
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CLC ; flag no byte received
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no_load ; empty load vector for EhBASIC
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no_save ; empty save vector for EhBASIC
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RTS
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; vector tables
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LAB_vec
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.word ACIAin ; byte in from simulated ACIA
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.word ACIAout ; byte out to simulated ACIA
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.word no_load ; null load vector for EhBASIC
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.word no_save ; null save vector for EhBASIC
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; EhBASIC IRQ support
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IRQ_CODE
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PHA ; save A
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LDA IrqBase ; get the IRQ flag byte
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LSR ; shift the set b7 to b6, and on down ...
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ORA IrqBase ; OR the original back in
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STA IrqBase ; save the new IRQ flag byte
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PLA ; restore A
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RTI
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; EhBASIC NMI support
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NMI_CODE
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PHA ; save A
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LDA NmiBase ; get the NMI flag byte
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LSR ; shift the set b7 to b6, and on down ...
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ORA NmiBase ; OR the original back in
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STA NmiBase ; save the new NMI flag byte
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PLA ; restore A
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RTI
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END_CODE
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LAB_mess
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.byte $0D,$0A,"6502 EhBASIC [C]old/[W]arm ?",$00
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; sign on string
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; system vectors
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.segment "VECTORS"
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.org $FFFA
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.word 0 ; NMI vector
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.word RES_vec ; RESET vector
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.word 0 ; IRQ vector
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