CPU bug fixes and Simulator enhancements.
Bug Fixes: - Fixed several bugs in the CPU that caused processor status flags to be set incorrectly. Instructions affected were: STA, STX, STY, CMP, CPX, CPY, BIT. - Made some internal-use-only methods on the CPU class private. - Fixed incorrect disassembly of (Indirect,X) and (Indirect),Y instructions. Although this didn't affect behavior, it certainly caused me some confusion in debugging. - Added missing "BCS" instruction to instruction table. Enhancements: - Now includes a full version of Lee Davison's Enhanced 6502 BASIC bundled as source code and a ROM image. Get that REAL COMPUTER EXPERIENCE!(tm) - If a file named "rom.bin" exists in the same directory where the simulator is executed, it will be loaded at addresses $d000-$ffff. - Gave the CPU an idle loop to make simulated timing a little more realistic (but this is still an area needing major improvement) - Changed the CPU's toString() method to give better debugging output. - Added a small typeahead buffer to the Console. - Better exception messaging. Misc: - Bumped version to 0.5, updated README.
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@@ -7,96 +7,97 @@ import junit.framework.TestCase;
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public class CpuZeroPageYModeTest extends TestCase {
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protected Cpu cpu;
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protected Bus bus;
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protected Memory mem;
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protected Cpu cpu;
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protected Bus bus;
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protected Memory mem;
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protected void setUp() throws Exception {
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this.cpu = new Cpu();
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this.bus = new Bus(0x0000, 0xffff);
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this.mem = new Memory(0x0000, 0x10000);
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bus.addCpu(cpu);
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bus.addDevice(mem);
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protected void setUp() throws Exception {
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this.cpu = new Cpu();
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this.bus = new Bus(0x0000, 0xffff);
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this.mem = new Memory(0x0000, 0x10000);
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bus.addCpu(cpu);
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bus.addDevice(mem);
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// Load the reset vector.
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bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
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bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00)>>>8);
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// Load the reset vector.
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bus.write(0xfffc, Cpu.DEFAULT_BASE_ADDRESS & 0x00ff);
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bus.write(0xfffd, (Cpu.DEFAULT_BASE_ADDRESS & 0xff00) >>> 8);
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cpu.reset();
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// Assert initial state
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assertEquals(0, cpu.getAccumulator());
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assertEquals(0, cpu.getXRegister());
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assertEquals(0, cpu.getYRegister());
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assertEquals(0x200, cpu.getProgramCounter());
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assertEquals(0xff, cpu.getStackPointer());
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assertEquals(0x20, cpu.getProcessorStatus());
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}
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cpu.reset();
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// Assert initial state
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assertEquals(0, cpu.getAccumulator());
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assertEquals(0, cpu.getXRegister());
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assertEquals(0, cpu.getYRegister());
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assertEquals(0x200, cpu.getProgramCounter());
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assertEquals(0xff, cpu.getStackPointer());
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assertEquals(0x20, cpu.getProcessorStatus());
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}
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/*
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* The following opcodes are tested for correctness in this file:
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*
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* STX - $96
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* LDX - $b6
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*
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*/
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/*
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* The following opcodes are tested for correctness in this file:
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*
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* STX - $96
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* LDX - $b6
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*
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*/
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/* STX - Store X Register - $96 */
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/* STX - Store X Register - $96 */
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public void test_STX() throws MemoryAccessException {
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cpu.setYRegister(0x30);
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cpu.setXRegister(0x00);
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bus.loadProgram(0x96, 0x10); // STX $10,Y
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cpu.step();
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assertEquals(0x00, bus.read(0x40));
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assertTrue(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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public void test_STX() throws MemoryAccessException {
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cpu.setYRegister(0x30);
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cpu.setXRegister(0x00);
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bus.loadProgram(0x96, 0x10); // STX $10,Y
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cpu.step();
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assertEquals(0x00, bus.read(0x40));
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// Should have no effect on flags.
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assertFalse(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.reset();
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cpu.setYRegister(0x30);
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cpu.setXRegister(0x0f);
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bus.loadProgram(0x96, 0x10); // STX $10,Y
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cpu.step();
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assertEquals(0x0f, bus.read(0x40));
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assertFalse(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.reset();
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cpu.setYRegister(0x30);
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cpu.setXRegister(0x0f);
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bus.loadProgram(0x96, 0x10); // STX $10,Y
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cpu.step();
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assertEquals(0x0f, bus.read(0x40));
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assertFalse(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.reset();
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cpu.setYRegister(0x30);
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cpu.setXRegister(0x80);
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bus.loadProgram(0x96, 0x10); // STX $10,Y
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cpu.step();
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assertEquals(0x80, bus.read(0x40));
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assertFalse(cpu.getZeroFlag());
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assertTrue(cpu.getNegativeFlag());
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}
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cpu.reset();
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cpu.setYRegister(0x30);
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cpu.setXRegister(0x80);
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bus.loadProgram(0x96, 0x10); // STX $10,Y
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cpu.step();
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assertEquals(0x80, bus.read(0x40));
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assertFalse(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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}
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/* LDX - Load X Register - $b6 */
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/* LDX - Load X Register - $b6 */
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public void test_LDX() throws MemoryAccessException {
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bus.write(0x40, 0x00);
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bus.write(0x41, 0x0f);
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bus.write(0x42, 0x80);
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public void test_LDX() throws MemoryAccessException {
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bus.write(0x40, 0x00);
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bus.write(0x41, 0x0f);
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bus.write(0x42, 0x80);
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bus.loadProgram(0xb6, 0x10,
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0xb6, 0x11,
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0xb6, 0x12);
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bus.loadProgram(0xb6, 0x10,
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0xb6, 0x11,
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0xb6, 0x12);
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cpu.setYRegister(0x30);
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cpu.setYRegister(0x30);
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cpu.step();
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assertEquals(0x00, cpu.getXRegister());
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assertTrue(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.step();
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assertEquals(0x00, cpu.getXRegister());
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assertTrue(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.step();
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assertEquals(0x0f, cpu.getXRegister());
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assertFalse(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.step();
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assertEquals(0x0f, cpu.getXRegister());
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assertFalse(cpu.getZeroFlag());
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assertFalse(cpu.getNegativeFlag());
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cpu.step();
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assertEquals(0x80, cpu.getXRegister());
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assertFalse(cpu.getZeroFlag());
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assertTrue(cpu.getNegativeFlag());
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}
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cpu.step();
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assertEquals(0x80, cpu.getXRegister());
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assertFalse(cpu.getZeroFlag());
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assertTrue(cpu.getNegativeFlag());
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}
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}
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