Added interrupt support for ACIA
+ Added interrupt support for ACIA + Auto-formatting (in case anyone cares)
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@@ -43,7 +43,7 @@ public class Acia6850 extends Acia {
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static final int STAT_REG = 0; // read-only
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static final int CTRL_REG = 0; // write-only
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static final int RX_REG = 1; // read-only
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static final int TX_REG = 1; // write-only
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@@ -58,7 +58,7 @@ public class Acia6850 extends Acia {
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case RX_REG:
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return rxRead(cpuAccess);
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case STAT_REG:
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return statusReg();
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return statusReg(cpuAccess);
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default:
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throw new MemoryAccessException("No register.");
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@@ -78,7 +78,7 @@ public class Acia6850 extends Acia {
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throw new MemoryAccessException("No register.");
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}
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}
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private void setCommandRegister(int data) {
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// Bits 0 & 1 control the master reset
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if((data & 0x01) != 0 && (data & 0x02) != 0) {
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@@ -97,8 +97,8 @@ public class Acia6850 extends Acia {
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* @return The contents of the status register.
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*/
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@Override
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public int statusReg() {
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// TODO: Parity Error, Framing Error, DTR, DSR, and Interrupt flags.
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public int statusReg(boolean cpuAccess) {
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// TODO: Parity Error, Framing Error, DTR, and DSR flags.
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int stat = 0;
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if (rxFull && System.nanoTime() >= (lastRxRead + baudRateDelay)) {
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stat |= 0x01;
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@@ -109,7 +109,14 @@ public class Acia6850 extends Acia {
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if (overrun) {
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stat |= 0x20;
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}
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if (interrupt) {
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stat |= 0x80;
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}
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if (cpuAccess) {
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interrupt = false;
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}
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return stat;
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}
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@@ -118,6 +125,7 @@ public class Acia6850 extends Acia {
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overrun = false;
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rxFull = false;
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txEmpty = true;
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interrupt = false;
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}
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}
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