Added interrupt support for ACIA

+ Added interrupt support for ACIA
+ Auto-formatting (in case anyone cares)
This commit is contained in:
Izuan Nazrin committed 2017-05-29 02:03:18 +08:00
1 parent 2e33756d49
commit f2ced29979
3 files changed
+34 -14

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@@ -42,13 +42,14 @@ public abstract class Acia extends Device {
boolean receiveIrqEnabled = false;
boolean transmitIrqEnabled = false;
boolean overrun = false;
boolean interrupt = false;
long lastTxWrite = 0;
long lastTxWrite = 0;
long lastRxRead = 0;
int baudRate = 0;
long baudRateDelay = 0;
/**
/**
* Read/Write buffers
*/
int rxChar = 0;
@@ -100,7 +101,7 @@ public abstract class Acia extends Device {
/**
* @return The contents of the status register.
*/
public abstract int statusReg();
public abstract int statusReg(boolean statusReg);
@Override
public String toString() {
@@ -117,13 +118,14 @@ public abstract class Acia extends Device {
}
public synchronized void rxWrite(int data) {
if(rxFull) {
if (rxFull) {
overrun = true;
}
rxFull = true;
if (receiveIrqEnabled) {
interrupt = true;
getBus().assertIrq();
}
@@ -132,11 +134,12 @@ public abstract class Acia extends Device {
public synchronized int txRead(boolean cpuAccess) {
if (cpuAccess) {
txEmpty = true;
txEmpty = true;
if (transmitIrqEnabled) {
getBus().assertIrq();
}
if (transmitIrqEnabled) {
interrupt = true;
getBus().assertIrq();
}
}
return txChar;
}
@@ -61,7 +61,7 @@ public class Acia6551 extends Acia {
case DATA_REG:
return rxRead(cpuAccess);
case STAT_REG:
return statusReg();
return statusReg(cpuAccess);
case CMND_REG:
return commandRegister;
case CTRL_REG:
@@ -178,8 +178,8 @@ public class Acia6551 extends Acia {
* @return The contents of the status register.
*/
@Override
public int statusReg() {
// TODO: Parity Error, Framing Error, DTR, DSR, and Interrupt flags.
public int statusReg(boolean cpuAccess) {
// TODO: Parity Error, Framing Error, DTR, and DSR flags.
int stat = 0;
if (rxFull && System.nanoTime() >= (lastRxRead + baudRateDelay)) {
stat |= 0x08;
@@ -190,6 +190,14 @@ public class Acia6551 extends Acia {
if (overrun) {
stat |= 0x04;
}
if (interrupt) {
stat |= 0x80;
}
if (cpuAccess) {
interrupt = false;
}
return stat;
}
@@ -201,6 +209,7 @@ public class Acia6551 extends Acia {
rxFull = false;
receiveIrqEnabled = false;
transmitIrqEnabled = false;
interrupt = false;
}
}
@@ -58,7 +58,7 @@ public class Acia6850 extends Acia {
case RX_REG:
return rxRead(cpuAccess);
case STAT_REG:
return statusReg();
return statusReg(cpuAccess);
default:
throw new MemoryAccessException("No register.");
@@ -97,8 +97,8 @@ public class Acia6850 extends Acia {
* @return The contents of the status register.
*/
@Override
public int statusReg() {
// TODO: Parity Error, Framing Error, DTR, DSR, and Interrupt flags.
public int statusReg(boolean cpuAccess) {
// TODO: Parity Error, Framing Error, DTR, and DSR flags.
int stat = 0;
if (rxFull && System.nanoTime() >= (lastRxRead + baudRateDelay)) {
stat |= 0x01;
@@ -109,6 +109,13 @@ public class Acia6850 extends Acia {
if (overrun) {
stat |= 0x20;
}
if (interrupt) {
stat |= 0x80;
}
if (cpuAccess) {
interrupt = false;
}
return stat;
}
@@ -118,6 +125,7 @@ public class Acia6850 extends Acia {
overrun = false;
rxFull = false;
txEmpty = true;
interrupt = false;
}
}