Commit Graph
3 Commits
Author SHA1 Message Date
Seth Morabito 2ebdd254b3 Work In Progress: CPU behavior, UI changes
This is something of a "Work in Progress" checkpoint of several features
that are all half baked:

1. Allow loading of 16KB ROM files at address $C000 at run-time, not
   just at startup. See the "Load ROM..." File menu item.

2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU
   implementation can match the behavior of either an early NMOS 6502, late
   NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so
   far.

3. Adds a completely bogus implementation of the 6522 VIA (it
   does absolutely nothing right now).

4. Changes the address of the ACIA in the simulated system to match a
   real hardware implementation I put together.
2012-11-25 22:49:21 -08:00
Seth J. Morabito ac88786df7 - Continued refactoring of address decoding.
- Device read and write may now throw MemoryAccessException, and appropriate
  throws clauses have been added throughout the code.
2010-01-09 16:53:04 -08:00
Seth Morabito 107aca7777 Implemented Zero Page,X, Zero Page,Y, and Indirect addressing mode instructions, along with unit tests. 2008-12-29 20:46:48 -08:00