The only description of the effects of "program reset" in the original MOS
datasheet is in the section for each register. The W65C51S and W65C51N
datasheets have a heading "PROGRAM RESET OPERATION", but it amounts to:
- internal registers are modified as described in the section for each register
- changes to the DTR, DCD, and DSR pins which Symon does not emulate
- the overrun flag is cleared
...which is what this new implementation does.
It would make *sense* for the reset to do things like "cancel transmission or
reception in progress" and stop asserting an interrupt, as the old code did,
but I can't find any evidence of such behaviour in the datasheets.
* Fix ACIA6850 Interrupt behavior, Interrupt should be cleared on status register read.
* Remove unneeded cpuAccess if statement from Acia6850 write that was preventing build completion
* Fix ACIA6850 Tests so they run.
This change introduces simulated baud rates in the ACIA. Baud rate is controlled just as in the real 6551, by writing to the ACIA's control register. Baud rates between 50 and 19,200 baud are selectable. A baud rate of 0 has special meaning, and turns off all simulated baud rate delays (on a real 6551, this means to use an external clock instead of the internal baud rate generator)
A busy-wait loop between steps in the simulator control program has also been added. This uses the high-resolution 'System.nanoTime()' call to wait a specific number of nanoseconds before continuing. Symon now waits at least 1uS between clock cycles, trying to approach a real 1MHz 6502 in performance. It is far from perfect, but it's better than it was.
Also refactored the status panel to use a BoxLayout, and DRY-up some of the code.
MOS6551 ACIA at address $C000 which does buffered input and output via the
console. Updated the README with a bit more documentation, and bumped the
version number to 0.1 because I'm impatient.
Tim Allen