Commit Graph
5 Commits
Author SHA1 Message Date
Maik Merten 52f4e9a00f enforce that the address range of devices falls within the address range of the bus. Turned out that the CPU tests instantiate memory with the last parameter as memory size, not end address (fixed now). Also make sure that the address lookup array takes the offset caused by non-zero starting addresses into account. 2014-07-25 21:24:16 +02:00
Seth Morabito bc3de80892 Execution Trace Log
Introduces an execution trace window that will keep track of the most
recent 10000 execution steps. I'm not entirely happy with the
implementation, yet.
2012-12-09 17:04:31 -08:00
Seth Morabito 2ebdd254b3 Work In Progress: CPU behavior, UI changes
This is something of a "Work in Progress" checkpoint of several features
that are all half baked:

1. Allow loading of 16KB ROM files at address $C000 at run-time, not
   just at startup. See the "Load ROM..." File menu item.

2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU
   implementation can match the behavior of either an early NMOS 6502, late
   NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so
   far.

3. Adds a completely bogus implementation of the 6522 VIA (it
   does absolutely nothing right now).

4. Changes the address of the ACIA in the simulated system to match a
   real hardware implementation I put together.
2012-11-25 22:49:21 -08:00
Seth J. Morabito 00ab8cd9ff Simulator is just about ready for real-world testing now. Added a simulated
MOS6551 ACIA at address $C000 which does buffered input and output via the
console. Updated the README with a bit more documentation, and bumped the
version number to 0.1 because I'm impatient.
2010-01-20 18:19:39 -08:00
Seth Morabito f174f0312f * Correct implementation of Indirect Indexed and Indexed Indirect addressing modes.
* Unit tests for Indirect Indexed and Indexed Indirect.
* Updated copyright dates.
* Started moving to JUnit 4.
2010-01-15 08:20:03 +00:00